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IBM’s Microprocessor division is readying a dual-core version of its PowerPC 970 processor, called the PowerPC G5 by Apple Computer Inc. According to sources, the new chip, code-named Antares, will make its way into workstations and servers sometime next year.

In documents obtained by, the new dual-core version will be designated PowerPC 970MP and will be available for testing purposes later this summer.

Currently, both IBM’s eServer BladeCenter JS20 and Apple’s line of Power Macintosh G5 desktops come with dual PowerPC 970 series processors. However, these forthcoming dual-core versions will expand the configuration options when compared with today’s multiple processor systems using the single-core PowerPC 970 or 970FX.

The PowerPC 970MP will contain two processing units per chip, with each carrying its own execution core, Level 1 cache and storage subsystems including a Level 2 cache. This move, according to sources at IBM, is intended to expand the PowerPC’s top frequency capabilities, currently at 2.5 GHz, in a dual-core configuration. The new chip will let vendors scale up server lines to a four-way SMP configuration.

While unfamiliar with both the documents or specifics of IBM’s plans, independent microprocessor analyst Peter Glaskowsky said the company’s addition of another core to the PowerPC line was a natural evolution.

“The 970FX is basically a single-core version of the dual-core IBM Power4+ [architecture] with simplified external interfaces. Restoring the second processor core would not be difficult for IBM,” said the Cupertino, Calif.-based analyst.

Though no data on planned processor speeds for the PowerPC 970MP were available, IBM documents suggested that hardware and software optimizations would make this processor more efficient in many computing situations than two separate processors at the same clock speed.

According to Glaskowsky, customers running imaging and scientific applications developed for the Mac platform will appreciate the multicore design. “A dual-core chip is more effective than a single-core chip on problems that stress the computational resources of the chip, more than the front-side bus bandwidth. Because the 970FX has a very fast, efficient front-side bus, most Mac applications will favor the dual-core configuration.”

For insights on Apple and Macintosh coverage around the Web, check out Matthew Rothenberg’s Weblog.

However, speed gains in new 90-nanometer have vexed chip vendors. In June 23, 2003, Apple CEO Steve Jobs introduced the Power Macintosh line with a top-of-the-line dual-processor model running at 2GHz. He predicted IBM would produce a 3GHz version within 12 months. Instead, the top model of Power Macintosh G5 presently sports dual 2.5 GHz processors.

IBM isn’t alone with such growing pains for 90nm fabrication as makers Advanced Micro Devices Inc. and Intel Corp. as well as foundries such as Taiwan Semiconductor Manufacturing Co. have all experienced troubled transitions to new process technologies.

Click here to read more on IBM’s push towards higher speeds for its PowerPC 970 series.

Like the earlier, single-core processors, the 970MP will be deeply pipelined. It will use 16 stages for most fixed-point integer operations; 18 for most load-and-store operations; and 21 stages for most floating-point operations. VMX operations, which will take 19 stages, will be handled in the 970MP’s AltiVec-compatible vector processing unit. Increasing the number of pipeline stages can add to processor complexity but can allow higher chip clock speeds.

With the longer pipelining, the 970MP will implement “instruction cracking,” which can distribute code requests to each core, splitting certain recognized instructions into several internal and simpler operations.

Analyst Glaskowsky said that this feature sounds new to the PowerPC architecture and it resembles the “micro-op translation” long used (and needed) in the more-complex x86 architectures.

Similar to the current PowerPC architecture, the 970MP processor cores will share a single EI (Elastic Interface) bus to an external north-bridge memory interface. The bus supports multiple bus ratios, from 2:1 to 24:1, giving manufacturers a range of options for matching processor and memory speeds.

In addition, the PowerPC 970MP will be a significantly larger package than the existing PowerPC 970FX. Compared to the latter, which sports a die size of 66.2 square millimeters, the PowerPC 970MP will spread out over 154 square millimeters. By comparison, a single 90nm “Prescott” Pentium 4 processor has a footprint of 112 square millimeters.

However, each core will have a dedicated 1MB of on-chip Level 2 cache, resulting in a four-fold increase in cache capacity over a current dual-processor configuration, Glaskowsky observed.

Though the PowerPC 970MP will feature a dozen power mode states (Full Run, Doze, Nap and Deep Nap, at one of three throttle speed states), the power and heat results for the dual-core model will be higher than for a single-core PowerPC 970FX. Apple’s current dual-processor machines use a water cooling technology and likely the dual-core machines will as well, sources said.

IBM declined to comment.

Read more here about IBM’s PowerTune power management technology found in the PowerPC 970FX processor.

Meanwhile, both AMD and Intel have stated that they are planning to bring dual-core processors to the market in 2005. Sources said IBM may start production of the PowerPC 970MP in early 2005, so the race for the first dual-core desktop computer looks to be an open field.

David Morgenstern,, contributed to this report.

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